Počítače s DDR3 je možné hacknúť aj bez chýb v softvéri
Diskusia k článku: Počítače s DDR3 je možné hacknúť aj bez chýb v softvéri
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Re: si si isty, ze ddr4 nema obdobny problem?
Od: Rudolf Dovičín
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Pridané:
2015-03-12 15:38:00
Veď si pozri originál:
JEDEC’s recently-published LPDDR4 standard for DRAM (where “LP” = “Low Power”) specifies two rowhammer mitigation features that a memory controller would be expected to use. (See JEDEC document JESD209-4 — registration is required to download specs from the JEDEC site, but it’s free.)
“Targeted Row Refresh” (TRR) mode, which allows the memory controller to ask the DRAM device to refresh a row’s neighbours.
A “Maximum Activate Count” (MAC) metadata field, which specifies how many activations a row can safely endure before its neighbours need refreshing.
Naviac (ale nepíšu či DDR3 alebo DDR4):
We found that at least one DRAM vendor indicates, in their public data sheets, that they implement rowhammer mitigations internally within a DRAM device, requiring no special memory controller support.
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